12 Plugins aus öffentlichen Claude Code marketplaces. Jedes bündelt Skills, Slash-Commands, Agents, Hooks oder MCP servers, die zusammen installiert werden.
Zeige 12 Plugins, die diesen Filtern entsprechen.
unboundcomputeUnboundCompute/security-agent-skills1
ai-skillsAmey-Thakur/AI-SKILLS1Reiche das repo mit .claude-plugin/marketplace.json ein und wir listen jedes plugin auf.
Marketplace einreichenBinary reverse engineering, malware analysis, firmware security, and software protection research for authorized security research, CTF competitions, and defensive security
ARM Cortex-M firmware development for Teensy, STM32, nRF52, and SAMD with peripheral drivers and memory safety patterns
Your embedded firmware toolkit in Claude Code | Claude Code 嵌入式固件工具箱 — battle-tested on real Cortex-M projects.
All embedded, MCU debugging, firmware, and library-integration Agent Skills maintained in this repository.
White-box bug hunting, AI-agent and LLM red-teaming, cloud identity and CI/CD trust, client-app trust surfaces across browser and editor extensions and Electron, wire-protocol and token trust across gRPC, WebSocket, and JWT, enterprise identity lifecycle across SCIM and JIT provisioning, directory sync, MFA and key lifecycle, and Kerberos delegation, infrastructure-as-code and container hardening, mobile app security, smart-contract and DeFi review across EVM and Move, skill and MCP supply-chain vetting, API and object-authorization depth, host privilege escalation, network-service and transport trust, firmware and embedded-software trust, web trust boundaries, authentication and session depth, rate-limiting and multi-tenant isolation, injection and resource-exhaustion depth, file-upload and content handling, defensive detection and logging, supply-chain and dependency risk, business-logic and access-control depth, the classic web-attack classes across XSS, template and command injecti
security8 working methods for embedded iot: embedded-debugging, embedded-memory-constraints, firmware-ota-updates, interrupt-safe-code, and more
Investigate, reverse-engineer, develop, and validate digital-camera modifications and interoperability, including custom firmware, hidden settings, camera control protocols, feature unlocks, and model-specific recovery. Use for feasibility research, offline analysis, controlled experiments, and explicitly authorized installation on photographic, cinema, and action cameras across manufacturers, especially Fujifilm X and Ricoh GR. Do not use for ordinary photography advice, routine vendor firmware updates, media editing, or unauthorized camera access.
Design, review, prototype, measure, and troubleshoot electronic circuits using component evidence, worst-case calculations, interface contracts, and staged bench verification. Use for component selection, analog or digital building blocks, power and protection, sensor conditioning, schematic-to-wiring review, instrumented diagnosis, and I2C electrical integration. Do not use as a substitute for exact device documentation, ESP32 firmware operations, FPGA RTL development, named CAD-tool operation, or regulated design certification.
Build, configure, flash, test, debug, and recover firmware for ESP32-family boards, including ESP-Mosaico kit bring-up, ESP-IDF C/C++, Arduino/PlatformIO, MicroPython, CircuitPython, ESPHome, Zephyr, Rust, and NuttX. Use when identifying an ESP32 board, choosing a framework, wiring GPIO or peripheral buses, integrating sensors or actuators, diagnosing serial/boot/power/network failures, planning OTA and production security, or automating hardware tests and fault injection. Do not use as a substitute for the exact board schematic, SoC datasheet, or attached component datasheet.
Design, review, simulate, and verify FPGA logic using explicit RTL contracts, clock and reset models, CDC analysis, timing constraints, and reproducible implementation evidence. Use for synthesizable HDL, fixed-point arithmetic, handshakes, testbenches, resource tradeoffs, timing closure, and FPGA release or bring-up planning. Do not use for ordinary MCU firmware, generic circuit design, a substitute vendor-tool manual, or unsupported claims of hardware or timing signoff.
Inference host bring-up + tuning suite — Linux/GPU bare-metal host work that sits beneath any inference framework (vLLM, sglang, TensorRT-LLM). Two phases. Bring-up (nvidia-datacenter-bringup): Ubuntu 24.04 LTS from clean OS to gpu-operator cuda-validator passing — B300/B200/H100/A100/L40S/L4 driver + fabricmanager + NVLSM + DOCA-OFED install order, NVIDIA CUDA repo + DOCA repo + air-gap mirror, MOK + DKMS sign-on-build under Secure Boot, Dell PowerEdge XE9780/XE9785 baseboard firmware via iDRAC Redfish DellOemChassis.ExtendedReset, gpu-operator pre-installed-driver-mode integration. Tuning (gpu-host-tuning): read-only snapshot of CPU power state, C-states, NUMA topology, PCIe link state, GPU settings, kernel boot params, sysctl, ulimits, IRQ affinity, container runtime; optional pinned-host↔GPU memcpy bench (torch + numactl); per-lever cheat-sheets to flip settings (governor, EPP, cpuidle, persistence, ECC, hugepages, intel_iommu, NCCL env, tuned-adm profiles, BIOS guidance for Dell X
inferencePrepare a Linux server with NVIDIA or Intel Arc GPUs for LLM and neural-network workloads: NVIDIA driver + CUDA from the official repo or the in-tree Intel i915/xe driver with distro firmware, Docker Engine with verified GPU access (NVIDIA Container Toolkit or /dev/dri passthrough) as the mandatory base, staged verification gates for both vendors, optional docker-compose presets for vLLM, Infinity, OpenWebUI and Ollama plus Intel Arc stacks (llama.cpp SYCL/Vulkan, Ollama, OpenVINO, vLLM), GPU power limits persisted via systemd, case fans driven by GPU temperature and Intel Arc idle-power fixes (ASPM).
ops
